Firefly Open Source Community

Title: Error MIPI CSI - PACKET_ERR_F_BNDRY_MATCG PACKET_ERR_F_SEQ PACKET_ERR_FRAME_DATA [Print This Page]

Author: di929873 Time: before yesterday 17:57
Title: Error MIPI CSI - PACKET_ERR_F_BNDRY_MATCG PACKET_ERR_F_SEQ PACKET_ERR_FRAME_DATA
Can you tell me where I can find the decryption of these errors?

regs_v2x.h
#define PACKET_ERR_F_BNDRY_MATCG  GENMASK(3, 0)
#define PACKET_ERR_F_SEQ GENMASK(7, 4)
#define PACKET_ERR_FRAME_DATA GENMASK(11, 8)
#define PACKET_ERR_ID    GENMASK(15, 12)
#define PACKET_ERR_ECC_1BIT GENMASK(19, 16)
#define PACKET_ERR_ECC_2BIT BIT(20)
#define PACKET_ERR_CHECKSUM GENMASK(27, 24)

where are the messages created - "MIPI error: packet: 0x%08x\n" and use the error

kernel/drivers/media/platform/rockchip/isp/capture_v21.c:

void rkisp_mipi_v21_isr(unsigned int phy, unsigned int packet,
   unsigned int overflow, unsigned int state,
   struct rkisp_device *dev)
{
  struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
  struct rkisp_stream *stream;
  u32 packet_err = PACKET_ERR_F_BNDRY_MATCG | PACKET_ERR_F_SEQ |
PACKET_ERR_FRAME_DATA | PACKET_ERR_ECC_1BIT |
PACKET_ERR_ECC_2BIT | PACKET_ERR_CHECKSUM;
  u32 state_err = RAW_WR_SIZE_ERR | RAW_RD_SIZE_ERR;
  int i, id;

  v4l2_dbg(3, rkisp_debug, &dev->v4l2_dev,
   "csi state:0x%x\n", state);
  dev->csi_dev.irq_cnt++;
  if (phy && (dev->isp_inp & INP_CSI) &&
   dev->csi_dev.err_cnt++ < RKISP_CONTI_ERR_MAX)
v4l2_warn(v4l2_dev, "MIPI error: phy: 0x%08x\n", phy);
  if ((packet & packet_err) && (dev->isp_inp & INP_CSI) &&
   dev->csi_dev.err_cnt < RKISP_CONTI_ERR_MAX) {
if (packet & 0xfff)
   dev->csi_dev.err_cnt++;
v4l2_warn(v4l2_dev, "MIPI error: packet: 0x%08x\n", packet);
  }
  if (overflow && dev->csi_dev.err_cnt++ < RKISP_CONTI_ERR_MAX)
v4l2_warn(v4l2_dev, "MIPI error: overflow: 0x%08x\n", overflow);
  if (state & state_err)
v4l2_warn(v4l2_dev, "MIPI error: size: 0x%08x\n", state);
  if (state & ISP21_MIPI_DROP_FRM)
v4l2_warn(v4l2_dev, "MIPI drop frame\n");

  /* first Y_STATE irq as csi sof event */
  if (state & (RAW0_Y_STATE | RAW1_Y_STATE)) {
for (i = 0; i < HDR_DMA_MAX - 1; i++) {
   if (!((RAW0_Y_STATE << i) & state) ||
      dev->csi_dev.tx_first[i])
      continue;
   dev->csi_dev.tx_first[i] = true;
   id = i ? 2 : 0;
   rkisp_csi_sof(dev, id);
   stream = &dev->cap_dev.stream[id + RKISP_STREAM_DMATX0];
   atomic_inc(&stream->sequence);
}
  }
  if (state & (RAW0_WR_FRAME | RAW1_WR_FRAME)) {
dev->csi_dev.err_cnt = 0;
for (i = 0; i < HDR_DMA_MAX - 1; i++) {
   if (!((RAW0_WR_FRAME << i) & state))
      continue;
   if (!dev->csi_dev.tx_first[i]) {
      id = i ? RKISP_STREAM_DMATX2 : RKISP_STREAM_DMATX0;
      stream = &dev->cap_dev.stream[id];
      atomic_inc(&stream->sequence);
   }
   dev->csi_dev.tx_first[i] = false;
}
  }
  if (state & ISP21_RAW3_WR_FRAME) {
dev->csi_dev.err_cnt = 0;
stream = &dev->cap_dev.stream[RKISP_STREAM_DMATX3];
atomic_inc(&stream->sequence);
  }

  if (dev->csi_dev.err_cnt > RKISP_CONTI_ERR_MAX) {
if (!(dev->isp_state & ISP_MIPI_ERROR)) {
   dev->isp_state |= ISP_MIPI_ERROR;
   rkisp_write(dev, CSI2RX_MASK_PHY, 0, true);
   rkisp_write(dev, CSI2RX_MASK_PACKET, 0, true);
   rkisp_write(dev, CSI2RX_MASK_OVERFLOW, 0, true);
   if (dev->hw_dev->monitor.is_en) {
      if (!completion_done(&dev->hw_dev->monitor.cmpl))
      complete(&dev->hw_dev->monitor.cmpl);
      dev->hw_dev->monitor.state |= ISP_MIPI_ERROR;
   }
}
  }
}

tchip_askquestions

full_kernel_log.zip

26.01 KB, Down times: 0

Welcome Firefly Open Source Community (https://bbs.t-firefly.com/)