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Posted at 4/25/2015 21:58:10
Only Author
2#
Additional,
I was done following.
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CRU_CLKSEL27_CON <= 0xff008000 /* LCDC clock prescale */
/* following is written on VOP manual(IO_MUX setting). */
GRF_GPIO1D_IOMUX <= 0x00550055
GRF_GPIO1H_SR <= 0x0f000f00
GRF_GPIO1D_E <= 0x00ff00ff
GRF_SOC_CON6 <= 0x00080000
GRF_SOC_CON7 <= 0x1fff1840
/* for LVDS (for LCDC) */
lvds+0x00*4 <= 0x7f
lvds+0x01*4 <= 0x40
lvds+0x02*4 <= 0x00
lvds+0x03*4 <= 0x46
lvds+0x04*4 <= 0x3f
lvds+0x05*4 <= 0x3f
lvds+0x0d*4 <= 0x0a
lvds+0x40*4 <= 0x7f
lvds+0x41*4 <= 0x40
lvds+0x42*4 <= 0x00
lvds+0x43*4 <= 0x46
lvds+0x44*4 <= 0x3f
lvds+0x45*4 <= 0x3f
lvds+0x4d*4 <= 0x0a
/* this is setting for SDA7123 PSAVE pin */
PMU_GPIO0_C_PULL <= 0x3ff
PMU_GPIO0_C_DRV <= 0x3f
PMU_GPIO0_C_IOMUX <= 0x00000000
/* following is VOP manual (RGBsetting) */
VOP_SYS_CTRL <= VOP_SYS_CTRL | (0x01u<<21) /* VOP DMA on */
/* following is default setting (may be MCGA) */
VOP_DSP_HTOTAL_HS_END
VOP_DSP_HACT_ST_END
VOP_DSP_VTOTAL_HS_END
VOP_DSP_VACT_ST_END
VOP_DSP_VS_ST_END_F1
VOP_DSP_VACT_ST_END_F1
/***********************/
VOP_DSP_BG<= (0xff<<20)|(0x3f<<10)|(0xf) /* background color */
VOP_REG_CFG_DONE<= 0x01 /* DONE!! */
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