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【Linux】
Core-3308Y MAC configuration
Posted at 8/22/2023 06:39:33
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Last edited by ivan.p In 8/22/2023 06:44 Editor
Hi everyone!
We experience an issue with MAC configuration using a custom Device Tree. The circuit is without external clock generation (MAC_CLK is expected to be provided by RK3308B).
An entry which is used in dts:
&mac {
phy-supply = <&vcc_phy>;
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&mac_clkin>;
clock_in_out = "output";
pinctrl-names = "default";
pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
//snps,reset-gpio = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
//snps,reset-active-low;
//snps,reset-delays-us = <0 50000 50000>;
status = "disable";
};
Parameter "status" is set to "okay" in an upper-level dts.
I suppose that at least "assigned-clock-parents" parameter must have another value, but I could not find any appropriate variants in rk3308.dtsi.
The picture that is observed on a scope: MAC_CLK signal appears for a second or two, then is turned off. The signal appears even when the parameter "clock_in_out" is set to "input". Nothing can be seen on TXD0, TXD1.
We have tried three cases.
1. Clean module on a custom baseboard, default device tree (rmii-m1 signals are used). No PHY is detected according to the log:
[ 1.430124] rk_gmac-dwmac ff4e0000.ethernet: clock input or output? (input).
[ 1.430168] rk_gmac-dwmac ff4e0000.ethernet: Can not read property: tx_delay.
[ 1.430190] rk_gmac-dwmac ff4e0000.ethernet: set tx_delay to 0x30
[ 1.430205] rk_gmac-dwmac ff4e0000.ethernet: Can not read property: rx_delay.
[ 1.430223] rk_gmac-dwmac ff4e0000.ethernet: set rx_delay to 0x10
[ 1.430248] rk_gmac-dwmac ff4e0000.ethernet: integrated PHY? (no).
[ 1.435583] rk_gmac-dwmac ff4e0000.ethernet: init for RMII
[ 1.435739] stmmac - user ID: 0x10, Synopsys ID: 0x35
[ 1.435750] Ring mode enabled
[ 1.435762] DMA HW capability register supported
[ 1.435778] Normal descriptors
[ 1.435791] RX Checksum Offload Engine supported (type 2)
[ 1.435801] TX Checksum insertion supported
[ 1.435811] Wake-Up On Lan supported
[ 1.435876] Enable RX Mitigation via HW Watchdog Timer
[ 1.438739] libphy: stmmac: probed
[ 1.438758] eth%d: No PHY found
2. Module on a custom baseboard, with a custom device tree (&mac entry shown above, rmii signals are used) - the same picture.
3. Module without any baseboard, just 5V power and terminal connected, default device tree. It manages to find some PHYs! I suppose that this is due to the noise on unconnected pins.
[ 0.198362] rk_gmac-dwmac ff4e0000.ethernet: clock input or output? (input).
[ 0.198413] rk_gmac-dwmac ff4e0000.ethernet: Can not read property: tx_delay.
[ 0.198431] rk_gmac-dwmac ff4e0000.ethernet: set tx_delay to 0x30
[ 0.198455] rk_gmac-dwmac ff4e0000.ethernet: Can not read property: rx_delay.
[ 0.198472] rk_gmac-dwmac ff4e0000.ethernet: set rx_delay to 0x10
[ 0.198497] rk_gmac-dwmac ff4e0000.ethernet: integrated PHY? (no).
[ 0.198802] rk_gmac-dwmac ff4e0000.ethernet: clock input from PHY
[ 0.203840] rk_gmac-dwmac ff4e0000.ethernet: init for RMII
[ 0.203997] stmmac - user ID: 0x10, Synopsys ID: 0x35
[ 0.204014] Ring mode enabled
[ 0.204025] DMA HW capability register supported
[ 0.204034] Normal descriptors
[ 0.204046] RX Checksum Offload Engine supported (type 2)
[ 0.204056] TX Checksum insertion supported
[ 0.204065] Wake-Up On Lan supported
[ 0.204127] Enable RX Mitigation via HW Watchdog Timer
[ 0.215581] libphy: stmmac: probed
[ 0.215625] eth%d: PHY ID 0000ffff at 0 IRQ POLL (stmmac-0:00) active
[ 0.215642] eth%d: PHY ID 0000ffff at 1 IRQ POLL (stmmac-0:01)
[ 0.215656] eth%d: PHY ID 0000ffff at 2 IRQ POLL (stmmac-0:02)
[ 0.215669] eth%d: PHY ID 0000ffff at 3 IRQ POLL (stmmac-0:03)
[ 0.215683] eth%d: PHY ID 0000ffff at 4 IRQ POLL (stmmac-0:04)
[ 0.215696] eth%d: PHY ID 0000ffff at 5 IRQ POLL (stmmac-0:05)
[ 0.215709] eth%d: PHY ID 0000ffff at 6 IRQ POLL (stmmac-0:06)
[ 0.215765] eth%d: PHY ID 0000ffff at 7 IRQ POLL (stmmac-0:07)
[ 0.215779] eth%d: PHY ID 0000ffff at 8 IRQ POLL (stmmac-0:08)
[ 0.215792] eth%d: PHY ID 0000ffff at 9 IRQ POLL (stmmac-0:09)
[ 0.215805] eth%d: PHY ID 0000ffff at 10 IRQ POLL (stmmac-0:0a)
[ 0.215818] eth%d: PHY ID 0000ffff at 11 IRQ POLL (stmmac-0:0b)
[ 0.215831] eth%d: PHY ID 0000ffff at 12 IRQ POLL (stmmac-0:0c)
[ 0.215851] eth%d: PHY ID 0000ffff at 13 IRQ POLL (stmmac-0:0d)
[ 0.215864] eth%d: PHY ID 0000ffff at 14 IRQ POLL (stmmac-0:0e)
[ 0.215877] eth%d: PHY ID 0000ffff at 15 IRQ POLL (stmmac-0:0f)
[ 0.215891] eth%d: PHY ID 0000ffff at 16 IRQ POLL (stmmac-0:10)
[ 0.215903] eth%d: PHY ID 0000ffff at 17 IRQ POLL (stmmac-0:11)
[ 0.215917] eth%d: PHY ID 0000ffff at 18 IRQ POLL (stmmac-0:12)
[ 0.215930] eth%d: PHY ID 0000ffff at 19 IRQ POLL (stmmac-0:13)
[ 0.215943] eth%d: PHY ID 0000ffff at 20 IRQ POLL (stmmac-0:14)
[ 0.215956] eth%d: PHY ID 0000ffff at 21 IRQ POLL (stmmac-0:15)
[ 0.215969] eth%d: PHY ID 0000ffff at 22 IRQ POLL (stmmac-0:16)
[ 0.215982] eth%d: PHY ID 0000ffff at 23 IRQ POLL (stmmac-0:17)
[ 0.215995] eth%d: PHY ID 0000ffff at 24 IRQ POLL (stmmac-0:18)
[ 0.216008] eth%d: PHY ID 0000ffff at 25 IRQ POLL (stmmac-0:19)
[ 0.216021] eth%d: PHY ID 0000ffff at 26 IRQ POLL (stmmac-0:1a)
[ 0.216034] eth%d: PHY ID 0000ffff at 27 IRQ POLL (stmmac-0:1b)
[ 0.216047] eth%d: PHY ID 0000ffff at 28 IRQ POLL (stmmac-0:1c)
[ 0.216062] eth%d: PHY ID 0000ffff at 29 IRQ POLL (stmmac-0:1d)
[ 0.216080] eth%d: PHY ID 0000ffff at 30 IRQ POLL (stmmac-0:1e)
[ 0.216092] eth%d: PHY ID 0000ffff at 31 IRQ POLL (stmmac-0:1f)
In the last case (just a bare Core-3308Y)
cat /sys/kernel/debug/pinctrl/pinctrl/pinmux-pins
shows that the pins are configured properly:
pin 128 (gpio4-0): ff4e0000.ethernet (GPIO UNCLAIMED) function gmac-m1 group rmiim1-pins
pin 129 (gpio4-1): ff4e0000.ethernet (GPIO UNCLAIMED) function gmac-m1 group rmiim1-pins
pin 130 (gpio4-2): ff4e0000.ethernet (GPIO UNCLAIMED) function gmac-m1 group rmiim1-pins
pin 131 (gpio4-3): ff4e0000.ethernet (GPIO UNCLAIMED) function gmac-m1 group rmiim1-pins
pin 132 (gpio4-4): ff4e0000.ethernet (GPIO UNCLAIMED) function gmac-m1 group rmiim1-pins
pin 133 (gpio4-5): ff4e0000.ethernet (GPIO UNCLAIMED) function gmac-m1 group rmiim1-pins
pin 134 (gpio4-6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 135 (gpio4-7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 136 (gpio4-8): fiq-debugger (GPIO UNCLAIMED) function uart4 group uart4-xfer
pin 137 (gpio4-9): fiq-debugger (GPIO UNCLAIMED) function uart4 group uart4-xfer
pin 138 (gpio4-10): (MUX UNCLAIMED) gpio4:138
pin 139 (gpio4-11): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 140 (gpio4-12): ff4e0000.ethernet (GPIO UNCLAIMED) function gmac-m1 group macm1-refclk-12ma
pin 141 (gpio4-13): ff4e0000.ethernet (GPIO UNCLAIMED) function gmac-m1 group rmiim1-pins
pin 142 (gpio4-14): ff4e0000.ethernet (GPIO UNCLAIMED) function gmac-m1 group rmiim1-pins
pin 143 (gpio4-15): ff4e0000.ethernet (GPIO UNCLAIMED) function gmac-m1 group rmiim1-pins
And in the first two cases (where no PHY is found) these pins are shown as unconfigured.
I can provide the whole DT source tree if it helps.
Thank you!
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