Firefly Open Source Community

   Login   |   Register   |
New_Topic
123
New Topic
Print Previous Topic Next Topic

eDP not work

211

Credits

0

Prestige

0

Contribution

intermediate

Rank: 3Rank: 3

Credits
211
Posted at 8/20/2018 15:54:23        Only Author  11#
Hi again,

I research problem from dmesg boot report and what i get original image where is no customized kernel:

[    1.524880] wk2xxx_serial_init()
[    1.525170] wk2xxx_request_port
[    1.525473] ttysWK0 at I/O 0x1 (irq = 101, base_baud = 460800) is a wk2xxx
[    1.526312] uart_add_one_port success for line i:= 0 with right 0
[    1.526846] wk2xxx_request_port
[    1.527136] ttysWK1 at I/O 0x2 (irq = 101, base_baud = 460800) is a wk2xxx
[    1.527941] uart_add_one_port success for line i:= 1 with right 0
[    1.528488] wk2xxx_request_port
[    1.528777] ttysWK2 at I/O 0x3 (irq = 101, base_baud = 460800) is a wk2xxx
[    1.529579] uart_add_one_port success for line i:= 2 with right 0
[    1.530112] wk2xxx_request_port
[    1.530414] ttysWK3 at I/O 0x4 (irq = 101, base_baud = 460800) is a wk2xxx
[    1.531235] uart_add_one_port success for line i:= 3 with right 0
[    1.531782] uart_add_one_port = 0x0
[    1.532114] register spi return v = :0

And what I get after customized kernel:

[    1.138158] wk2xxx_probe()  GENA = 0x0
[    1.138492] spi driver  error!!!!
[    1.138819] wk2xxxspi: probe of spi32766.0 failed with error 1
[    1.139346] register spi return v = :0

Is this some issue to display interface?


Pekka
Reply

Use props Report

211

Credits

0

Prestige

0

Contribution

intermediate

Rank: 3Rank: 3

Credits
211
Posted at 8/22/2018 15:39:16        Only Author  12#
Hi,

Sneaking problems I have more details where problems beginnings:

-After tens kernel compiling and kernel source research i can't find problems in dp section.

-So I start search problem somewhere else. Why boot stuck? How I know where it freeze?

-> I connect USB-RS232 to Firefly Debug port and get that report:

DDR Version 1.07 20161103
In
soft reset
SRX
Channel 0: DDR3, 666MHz
Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
Channel 1: DDR3, 666MHz
Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
256B stride
ch 0 ddrconfig = 0x101, ddrsize = 0x20
ch 1 ddrconfig = 0x101, ddrsize = 0x20
pmugrf_os_reg[2] = 0x32817281, stride = 0x9
OUT
Boot1: 2016-07-29, version: 1.05
CPUId = 0x0
ChipType = 10 1912
SdmmcInit=2 0
BootCapSize=100000
UserCapSize=14910MB
FwPartOffset=2000 , 100000
SdmmcInit=0 20
StorageInit ok = 63917
LoadTrustBL
No find bl30.bin
No find bl32.bin
theLoader 200000 79693
LoaderFlag2: 0xc3524200
WARNING: plat_rockchip_comm_sram_init:code:ff8d9000, 67000, ef0
NOTICE:  BL31: v1.2(debug):b995f80
NOTICE:  BL31: Built : 16:53:56, Nov  7 2016
INFO:    GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
INFO:    boot cpu mask: 0
INFO:    Vesion: 2016.0.01
INFO:    plat_rockchip_pmu_init(1211): pd status 3e
INFO:    BL31: Initializing runtime services
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0x200000
INFO:    SPSR = 0x3c9


U-Boot 2017.02-RK3399-06-ga7c7ca8 (Apr 25 2017 - 15:10:21)

CPU: rk3399
cpu version = 0
CPU's clock information:
    aplll = 816000000HZ
    apllb = 24000000HZ
    gpll = 594000000HZ
               aclk_periph_h = 148500000HZ, hclk_periph_h = 74250000HZ, pclk_periph_h = 37125000HZ
               aclk_periph_l0 = 99000000HZ, hclk_periph_l0 = 99000000HZ, pclk_periph_l0 = 49500000HZ
               hclk_periph_l1 = 99000000HZ, pclk_periph_l1 = 49500000HZ
    cpll = 800000000HZ
    dpll = 660000000HZ
    vpll = 24000000HZ
    npll = 24000000HZ
    ppll = 676000000HZ
Board:  Rockchip platform Board
Uboot as second level loader
DRAM:  Found dram banks: 1
Adding bank:0000000000200000(000000007fe00000)
128 MiB
SdmmcInit = 0 20
storage init OK!
Using default environment

GetParam
Load FDT from resource image.
no key node
usb bc: can find node by path: /dwc-control-usb/usb_bc
dwc_otg_check_dpdm: usb bc disconnected
pmic:rk808
can't find dts node for pwm1
set pwm voltage ok,pwm_id =2 vol=1000000,pwm_value=33
CPU's clock information:
    aplll = 816000000HZ
    apllb = 24000000HZ
    gpll = 594000000HZ
               aclk_periph_h = 148500000HZ, hclk_periph_h = 74250000HZ, pclk_periph_h = 37125000HZ
               aclk_periph_l0 = 99000000HZ, hclk_periph_l0 = 99000000HZ, pclk_periph_l0 = 49500000HZ
               hclk_periph_l1 = 99000000HZ, pclk_periph_l1 = 49500000HZ
    cpll = 800000000HZ
    dpll = 660000000HZ
    vpll = 24000000HZ
    npll = 24000000HZ
    ppll = 676000000HZ
Can't find dts node for fuel guage cw201x
can't find dts node for ec-battery
Can't find dts node for charger bq25700
SecureBootEn = 0, SecureBootLock = 0

#Boot ver: 2017-04-25#1.05
empty serial no.
normal boot.
checkKey
vbus = 0
no fuel gauge found
no fuel gauge found
read logo on state from dts [1]
no fuel gauge found
EDID data does not include any extensions.
Using display timing from edid
EDID version: 1.4
Product ID code: 143e
Manufacturer: SHP
Serial number: 00000000
Manufactured in week: 40 year: 2015
Video input definition: digital signal, voltage level 1, composite sync, serration v
Monitor is RGB
Maximum visible display size: 35 cm x 19 cm
Power management features: no active off, no suspend, no standby
Estabilished timings:
Standard timings:
        3840x2160       59 Hz (detailed)
Monitor ID: 7PHPT▒LQ156D
Detailed mode clock 533250 kHz, flags[a]
    H: 3840 3888 3920 4000
    V: 2160 2163 2168 2222
bus_format: 100e
rk lcdc - 0 dclk set: dclk = 533250000HZ, pll select = 1, div = 1
"Synchronous Abort" handler, esr 0x96000004
ELR:     59480cc
LR:      592f600
x0 : 0000000005720c80 x1 : ffffffffffffffff
x2 : 0000000000000670 x3 : 0000000000000000
x4 : 0000000005720c80 x5 : 00000000000003e8
x6 : 0000000000000000 x7 : 0000000000000020
x8 : 00000000ffffffff x9 : 0000000000000008
x10: 0000000000000031 x11: 000000000595c000
x12: 000000000000000f x13: 0000000000000030
x14: 000000000000000a x15: 000000000590e8e4
x16: 000000000590eae8 x17: 0000000000000000
x18: 000000000570c928 x19: 0000000005720640
x20: 0000000005720618 x21: 000000000570e410
x22: 000000000595d458 x23: 000000000000003b
x24: 00000000057205d0 x25: 0000000005720550
x26: 0000000000000070 x27: 0000000000000fa0
x28: 0000000000000f30 x29: 000000000570c660

Resetting CPU ...


Googling "Synchronous Abort" handler, esr 0x96000004 message and it is some error in bus communication.

Have You any help for that message?


Thanks,
Pekka
Reply

Use props Report

211

Credits

0

Prestige

0

Contribution

intermediate

Rank: 3Rank: 3

Credits
211
Posted at 8/22/2018 16:43:09        Only Author  13#
So I need to update loader?

How I do that?

Pekka
Reply

Use props Report

211

Credits

0

Prestige

0

Contribution

intermediate

Rank: 3Rank: 3

Credits
211
Posted at 8/23/2018 22:17:41        Only Author  14#
Hi,

Now U-boot won't start anymore...


U-Boot 2017.09-gc58a816-dirty (Aug 23 2018 - 14:48:46 +0300)

Model: Firefly-RK3399 Board
DRAM:


What next?

Pekka
Reply

Use props Report

792

Credits

10

Prestige

10

Contribution

advanced

Rank: 4

Credits
792
Posted at 8/24/2018 09:23:48        Only Author  15#
peksuj Posted at 8/23/2018 22:17
Hi,

Now U-boot won't start anymore...

http://en.t-firefly.com/doc/product/info/id/480.html
Get into Maskrom mode and reflash firmware.
Reply

Use props Report

211

Credits

0

Prestige

0

Contribution

intermediate

Rank: 3Rank: 3

Credits
211
Posted at 8/24/2018 14:12:07        Only Author  16#
Thanks Leung!

I try that. But now I must be more carefull what I do.


Pekka
Reply

Use props Report

211

Credits

0

Prestige

0

Contribution

intermediate

Rank: 3Rank: 3

Credits
211
Posted at 8/27/2018 20:06:00        Only Author  17#
Hi,

I get AIO-3399J work again! I try update device again and problem is my u-boot or parameter file. I try follow ROC-RK3328-CC wiki guide "Compiling Linux Firmware" but something was gone wrong...

Can You give some links where I can find instructions for compile u-boot and make parameter file?

Thanks,
Pekka
Reply

Use props Report

211

Credits

0

Prestige

0

Contribution

intermediate

Rank: 3Rank: 3

Credits
211
Posted at 8/27/2018 22:31:09        Only Author  18#
I found Uboot instructions in AIO-3399J wiki. I try that tomorrow.

Pekka
Reply

Use props Report

211

Credits

0

Prestige

0

Contribution

intermediate

Rank: 3Rank: 3

Credits
211
Posted at 8/29/2018 20:48:52        Only Author  19#
Hi,

I get now new uboot and ubuntu start whit eDP connected. Bootloader find eDP display and read EDID.

HDMI works greate, but eDP doesn't. I try also another 1080p eDP display, but same thing...

hdmi_dev->video.vic is 4
rk lcdc - 1 dclk set: dclk = 74250000HZ, pll select = 0, div = 1
rockchip_panel_prepare: failed to find panel prepare funcs
hdmi_dev_config_video vic 4 color_output 1 color_output_depth 8
pixel clk is 74250000 tmds clk is 74250000
hsync_pol 1 vsync_pol 1
[HDMI] sucess output HDMI.
PHY PLL not locked: PCLK_ON=1,TMDSCLK_ON=0
rockchip_panel_enable: failed to find panel prepare funcs
ERROR: [get_entry_ram]: Cannot find logo_kernel.bmp!
failed to display kernel logo
rockchip_panel_prepare: failed to find panel prepare funcs
EDID data does not include any extensions.
Using display timing from edid
EDID version: 1.4
Product ID code: 143e
Manufacturer: SHP
Serial number: 00000000
Manufactured in week: 40 year: 2015
Video input definition: digital signal, voltage level 1, composite sync, serration v
Monitor is RGB
Maximum visible display size: 35 cm x 19 cm
Power management features: no active off, no suspend, no standby
Estabilished timings:
Standard timings:
        3840x2160       59 Hz (detailed)
Monitor ID: 7PHPT▒LQ156D
Detailed mode clock 533250 kHz, flags[a]
    H: 3840 3888 3920 4000
    V: 2160 2163 2168 2222
bus_format: 0
rk lcdc - 0 dclk set: dclk = 533250000HZ, pll select = 1, div = 1
rockchip_panel_prepare: failed to find panel prepare funcs
Link Training Clock Recovery success
EQ Max loop
LT EQ failed!
eDP link training failed (-5)
Link Training Clock Recovery success
EQ Max loop
LT EQ failed!
eDP link training failed (-5)
Link Training Clock Recovery success

I try "xrandr --auto"
-> xrandr: cannot find crtc for output eDP-1

I copy edp settings from android kernel dts file "rk3399-firefly-aio-edp" to "rk3399-firefly-aio-linux" file.

Where I must start looking problem?


Thanks,
Pekka
Reply

Use props Report

211

Credits

0

Prestige

0

Contribution

intermediate

Rank: 3Rank: 3

Credits
211
Posted at 8/30/2018 14:02:11        Only Author  20#
Hi,

What source you are use when compile linux u-boot to AIO-3399J? I was now try many sources but every time different problems.

I try https://github.com/FireflyTeam/u-boot.git but that not make miniloader, uboot.img and trust.img files...


Thanks,
Pekka
Reply

Use props Report

Return to List
123
You need to log in before you can reply Login | Register

This forum Credits Rules

Quick Reply Back to top Back to list