eDP not work

peksuj

Thanks Leung!

I try that. But now I must be more carefull what I do.


Pekka

peksuj

Hi,

I get AIO-3399J work again! I try update device again and problem is my u-boot or parameter file. I try follow ROC-RK3328-CC wiki guide "Compiling Linux Firmware" but something was gone wrong...

Can You give some links where I can find instructions for compile u-boot and make parameter file?

Thanks,
Pekka

peksuj

I found Uboot instructions in AIO-3399J wiki. I try that tomorrow.

Pekka

peksuj

Hi,

I get now new uboot and ubuntu start whit eDP connected. Bootloader find eDP display and read EDID.

HDMI works greate, but eDP doesn't. I try also another 1080p eDP display, but same thing...

hdmi_dev->video.vic is 4
rk lcdc - 1 dclk set: dclk = 74250000HZ, pll select = 0, div = 1
rockchip_panel_prepare: failed to find panel prepare funcs
hdmi_dev_config_video vic 4 color_output 1 color_output_depth 8
pixel clk is 74250000 tmds clk is 74250000
hsync_pol 1 vsync_pol 1
[HDMI] sucess output HDMI.
PHY PLL not locked: PCLK_ON=1,TMDSCLK_ON=0
rockchip_panel_enable: failed to find panel prepare funcs
ERROR: [get_entry_ram]: Cannot find logo_kernel.bmp!
failed to display kernel logo
rockchip_panel_prepare: failed to find panel prepare funcs
EDID data does not include any extensions.
Using display timing from edid
EDID version: 1.4
Product ID code: 143e
Manufacturer: SHP
Serial number: 00000000
Manufactured in week: 40 year: 2015
Video input definition: digital signal, voltage level 1, composite sync, serration v
Monitor is RGB
Maximum visible display size: 35 cm x 19 cm
Power management features: no active off, no suspend, no standby
Estabilished timings:
Standard timings:
        3840x2160       59 Hz (detailed)
Monitor ID: 7PHPT▒LQ156D
Detailed mode clock 533250 kHz, flags[a]
    H: 3840 3888 3920 4000
    V: 2160 2163 2168 2222
bus_format: 0
rk lcdc - 0 dclk set: dclk = 533250000HZ, pll select = 1, div = 1
rockchip_panel_prepare: failed to find panel prepare funcs
Link Training Clock Recovery success
EQ Max loop
LT EQ failed!
eDP link training failed (-5)
Link Training Clock Recovery success
EQ Max loop
LT EQ failed!
eDP link training failed (-5)
Link Training Clock Recovery success

I try "xrandr --auto"
-> xrandr: cannot find crtc for output eDP-1

I copy edp settings from android kernel dts file "rk3399-firefly-aio-edp" to "rk3399-firefly-aio-linux" file.

Where I must start looking problem?


Thanks,
Pekka

peksuj

Hi,

What source you are use when compile linux u-boot to AIO-3399J? I was now try many sources but every time different problems.

I try https://github.com/FireflyTeam/u-boot.git but that not make miniloader, uboot.img and trust.img files...


Thanks,
Pekka

peksuj

Hi,

I get now uboot from android git, kernel from FireflyTeam git and using original Linux rootfs image. I see in boot debug and Linux that everything should work, but nothing in eDP display. I check signals from eDP connector and AUX was giving 760mV peak-to-peak signal, TX1, TX2 and TX3 give also 1070mV peak-to-peak, but TX0 doesn't give any signal...

What can be problem?

Pekka

peksuj

So Android uboot is not compitable?

peksuj

Hi,

I test today AIO-3399J board with Android and LVDS, it is work. But I also try eDP with no success. I think that TX0 port is broken. There is no signal at all...

Pekka

peksuj

Hi,

I try use Android rk3399-firefly-aio-edp.dts. I get backlight on and Android find display but can't get nothing to display. I change compatible to "simple-panel". Do I need to set any other parameters to kernel files? Timing?

Product ID code: 35ed
Manufacturer: AUO
Serial number: 00000000
Manufactured in week: 0 year: 2013
Video input definition: digital signal, voltage level 0, blank to black, composite sync, serration v
Monitor is non-RGB
Maximum visible display size: 34 cm x 19 cm
Power management features: no active off, no suspend, no standby
Estabilished timings:
Standard timings:
        1920x1080       60 Hz (detailed)
        1920x1080       40 Hz (detailed)
Detailed mode clock 142000 kHz, flags[a]
    H: 1920 2028 2076 2100
    V: 1080 1090 1100 1126
bus_format: 1009
rk lcdc - 0 dclk set: dclk = 142000000HZ, pll select = 1, div = 1
CR Max reached (0,3,0)
LT CR failed!
eDP link training failed (-5)
Link Training Clock Recovery success
EQ Max loop
LT EQ failed!
eDP link training failed (-5)
Link Training Clock Recovery success


Thanks,
Pekka